IPC-7351 Padstack Naming Convention |
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Tom H
Admin Group Joined: 05 Jan 2012 Location: San Diego, CA Status: Offline Points: 5718 |
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AleksMK, do you have a copy of the pad stack naming convention document?
You can download it here - www.pcblibraries.com/downloads |
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AleksMK
New User Joined: 31 Mar 2020 Status: Offline Points: 4 |
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Hi Tom, Yes, I do have the document, the question arose from reading that document. As I quoted, It's not very clear to me how the naming for my padstack should be? Any advice on that? Thanks! Aleks
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Tom H
Admin Group Joined: 05 Jan 2012 Location: San Diego, CA Status: Offline Points: 5718 |
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There is a pad stack naming issue with the current V2019 Library Expert for SMD pads that are defined on both the Top and Bottom layers. This issue will be fixed in V2020 coming out next month.
To create a complex pad stack, you need the FP Designer feature and that does not come with the free Library Expert Pro (yet), but next month when V2020 is released, the Library Expert Pro will have 100% full featured program (just like the Enterprise version) and support these CAD tools -
Also, starting next week we start giving away the full featured Library Expert Enterprise for free. Just pay the yearly maintenance to get all the updates and technical support for the year. Pick any CAD tool and get our new Cloud License for a yearly lease at 20% of list price. Bottom line is that you need FP Designer to create custom pad stacks and we're either going to give that away for free or lease it at an affordable price point. The software program needs to work perfect to take away any guessing and confusion. Also, putting a SMD pad on the top & bottom layers is rare. What application is this for? |
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AleksMK
New User Joined: 31 Mar 2020 Status: Offline Points: 4 |
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Hi Tom, Thanks for all the info, although a bit unrelated to my question :-) The application for which I need this padstack is creating test points in OrCAD PCB Designer Professional, where the padstack need to be defined on the layer where you are creating the test point. So if I want a test point on the bottom layer, I need to have the bottom layer defined in my padstack. The padstack is not being mirrored when adding testpoints, hence this requirement. If I may re-iterate my question: using the padstack naming convention that I have downloaded from PCB Libraries, what is the correct name to name a padstack which will have a circular land patter on the bottom layer only 1.2mm in
size, with a solder mask on the bottom layer only with 1.3mm opening
and no bottom paste mask layer? Cheers
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Tom H
Admin Group Joined: 05 Jan 2012 Location: San Diego, CA Status: Offline Points: 5718 |
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Modifiers that are used when pad stack features are different than the defaults x = Special modifier
used alone or following other modifiers for lands on opposite side to primary
layer land dimension So the "x" comes before the shape character. |
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AleksMK
New User Joined: 31 Mar 2020 Status: Offline Points: 4 |
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Thanks! So I will name my padstack xc120mx130px0. Cheers! Aleks
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Tom H
Admin Group Joined: 05 Jan 2012 Location: San Diego, CA Status: Offline Points: 5718 |
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Updated Pad Stack Naming Convention released in IPC-7352. |
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