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Thermal Tab and Solder Paste Discussion

Printed From: PCB Libraries Forum
Category: Libraries
Forum Name: Footprints / Land Patterns
Forum Description: [General or a CAD specific issues / discussions]
Printed Date: 29 May 2024 at 5:24am

Topic: Thermal Tab and Solder Paste Discussion
Posted By: sot23
Subject: Thermal Tab and Solder Paste Discussion
Date Posted: 25 Jan 2023 at 7:54am

My company has finally installed PCB Footprint Expert on our computers. Time to update the old .xml preference file to the new .opt file !

By default, the IPC-7351C.opt file uses a Thermal Tab Paste Mask Percentage of 50%.
The IPC-7351B states that "The default paste mask for these pads is 40% of the overall land area".

May I ask why this 10% difference ? I know things have changed since the realase of IPC-7351B. 
Is it just a guess or is there some document that talks about this 50% amount ? 
EDIT : I just read PCB FOOTPRINT EXPERT documentation more closely and found this line : "IPC- 7093A figure 3-10 recommends that the stencil design provide 50 – 60% solder paste coverage on the thermal pad area."
Follow up question : why the difference between IPC-7351 and IPC-7093 ?

Another topic : What do you think about vias in thermal tabs ? Depending on the person I ask this question, I get two main answers : 
  • Never do this !! The solder paste will flow in the vias if there is no soldermask between the solder paste and the via. Put the vias in a copper pour around the thermal pad
  • Put as many as you can !! The solder paste will stay in its place and will most probably not flow inside the via.

Does someone here has interesting documentation that I could read concerning these subject ? 
Like testings for Solder paste amount and patterns ? 
I know there is IPC-7093 that discuss this subject, but I don't have access to it (for now at least).
I also found this post which have interesting information :" rel="nofollow -
And this article, linked in the previous post :" rel="nofollow -

Posted By: Tom H
Date Posted: 25 Jan 2023 at 9:34am
IPC-7351C was canceled and replaced with IPC-7352. 

It includes through-hole and should be released next month. 

There is an IPC-7352 .opt file in the main folder. 

For thermal tabs, there is a new Option to Solder Mask Define the pad. 

This dams in the paste mask and prevents it from flowing. 

See this article:" rel="nofollow -

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Posted By: gvellet
Date Posted: 25 Jan 2023 at 1:17pm

Maybe I am missing something, but the option for solder mask define is not easily usable in QFN with tab. Yes you can set a paste mask pourcentage. The SM pattern will match 1:1 with the solder paste pattern. But the option for minimum pattern space is non functional.
Hence the software will arbitrarily decide how many little square it will generate to meet the required paste %. But without the minimum pattern space options, there is no way to guaranty that the via holes will be covered with solder mask. The only indirect way to control the pattern spacing is to reduce the paste %, which is not ideal.

Best regards,

Posted By: Tom H
Date Posted: 25 Jan 2023 at 1:27pm
Solder Mask defined Thermal Pad technology was introduced by IBM in Canada and included in the rewrite of IPC-7093A last year. 

They did extensive testing and have all the results published. 

Solder Mask defined Thermal Pad technology eliminates Thermal Pad Paste Mask voids and allows vias to be unplugged, which saves 10% on fabrication costs. 

They also published thermal relief percentage for every via hole and calculated 9 via holes is the most the thermal pad requires. Any additional holes are have minimal thermal reduction. 

Also, the paste mask aperture openings on thermal pads contour around the vias adding extra paste mask percentage. 

I know that Footprint Expert can't do this right now, but it's future technology. 

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Posted By: Tom H
Date Posted: 10 Jul 2023 at 9:42am
IPC-7352 was released today -" rel="nofollow -

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