In the near future, we'll be mapping 3D Models with Footprints and several things need to line up and one of them is "Height". The Footprint and 3D Model must have the same rotation, name, origin, height, etc. They are synced together. One of the main things that IPC is considering for Footprint Name creation is to add a 2 - 3 character suffix at the end of the name to indicate the component manufacturer. I will be posting an Excel spreadsheet list of all component manufacturers and the recommended suffix characters. This will distinguish the variances between the component manufacturer's tolerances. We are trying to resolve having 2 components with the same "nominal" dimensions but different tolerances and therefore different pad sizes and spacing that result in the same footprint name. But in our viewpoint, "Component Height" does require different footprint names primarily because of the emerging 3D Model technology in the electronics industry. There is an exception to this rule for people who are using enterprise CAD tools like Expediton, Allegro and CR-5000 which can handle component height differently than a normal PCB layout tool like PADS or Altium. The enterprise tool has the ability to use the same footprint but have different attributes for different heights. I guess PADS Layout has the same feature in that a "Decal" is the footprint with pads and 2D Lines and the Part Type has all the attributes like Height, component family, gates, apha-numeric pin assignments and Decal Mapping. So a single "Decal (footprint)" can have hundreds of logical "Part Types" with different component mfr. part number names. i.e.: the Part Type name is totally different than the Decal name. This was intended to reduce duplication of Decals, however it does get rather complex when some Decals have a thousand Part Types with different names while other Decals are one-of-a-kind and the Part Type and Decal name are identical. In my humble opinion, every Decal and Part Type name should be the same. There will be some duplication but at least it's clean and less confusing to the PCB designer and EE engineer.
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