AVX TurboCap Footprint |
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RLS2004
Advanced User Joined: 26 Jan 2012 Location: Seattle,WA Status: Offline Points: 51 |
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Posted: 27 Apr 2012 at 11:45am |
What should the heel, toe and side solder joint dimensions be? AVX Turbo Cap, J style leads, ST205C series High_CV SMPS capacitor. Link to data sheet: |
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RLS2004
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Tom H
Admin Group Joined: 05 Jan 2012 Location: San Diego, CA Status: Offline Points: 5719 |
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You need more than Toe, Heel & Side dimensions to calculate the Pad Size and Spacing. These 7 factors are used to calculate the optimum Land Size Component Body Tolerance – ± 4 Mil (0.1) thru ± 12 (0.3) Also, the "J Style Leads" are really "Outward L Bend" - The new upcoming 2012 IPC Footprint Calculator is component lead based to handle every component family. But for the time being here is the info you asked for - Toe = 14 mils (0.35 mm) Heel = 14 mils (0.35 mm) Side = 2 mils (0.05 mm) If you use mils, round-off the pad size and pad center spacing in 1 mil increments. |
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RLS2004
Advanced User Joined: 26 Jan 2012 Location: Seattle,WA Status: Offline Points: 51 |
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Hi Tom,
Thanks for the reply. Did you note that the "J style leads" on this part bend UNDER the component. Looks similar to an SOIC but the leads bend under the part. Old IPC-SM-782 page 10 figure 3-2 shows a "C" bend style of lead that looks similar to this part. What 7351 component family would you recommend for this part? |
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RLS2004
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Tom H
Admin Group Joined: 05 Jan 2012 Location: San Diego, CA Status: Offline Points: 5719 |
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My mistake, but the same solder joint goals for Toe, Heel and Side apply.
IPC-7351 uses "Component Families" to break down solder joints. The new IPC Footprint Calculator uses "Component Leads" instead. There are 150 different standard component families and unknown number of non-standard component families, but there are only 21 different Component Lead Styles. What do these Component Families have in common? Ceramic Flat Pack (CFP) Ceramic Quad Flat Pack (CQFP) Small Outline Diode (SOD) Small Outline Transistor (SOT23, SOT223, SOT343 & SOT143) Small Outline Package (SOP) Transistor Outline (TO or DPAK) They all have a Gull Wing lead form. So why apply the same rules to 9 different component families when it's better (more efficient) to apply rules to a single Lead Form. We still have component families in the Footprint Calculator, but the "Preference Rules" are much simpler when the rules are applied to the "Lead Form". |
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