Overlay clearance to include solder mask

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   Having created a footprint and then used it in Altium I am getting a silkscreen to solder mask error. The rules in PCB LE are set to give overlay clearance to copper and the footprint was correctly created to this rule.
Is there a way to include overlay clearance to solder mask or should I simply increase the clearance to copper to allow for my standard solder mask clearance?

Many thanks

Neil

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NeilVPeers Members Profile Send Private Message Find Members Posts Add to Buddy List Active User Joined: 04 Aug 2016 Status: Offline Points: 17	Post Options Post Reply Quote NeilVPeers Report Post Thanks(0) Quote Reply Topic: Overlay clearance to include solder mask Posted: 17 Dec 2017 at 5:30am
	Having created a footprint and then used it in Altium I am getting a silkscreen to solder mask error. The rules in PCB LE are set to give overlay clearance to copper and the footprint was correctly created to this rule. Is there a way to include overlay clearance to solder mask or should I simply increase the clearance to copper to allow for my standard solder mask clearance? Many thanks Neil



Tom H Members Profile Send Private Message Find Members Posts Add to Buddy List Admin Group Joined: 05 Jan 2012 Location: San Diego, CA Status: Offline Points: 5718	Post Options Post Reply Quote Tom H Report Post Thanks(0) Quote Reply Posted: 17 Dec 2017 at 11:18am
	In Preferences, the default Legend Clearance is set to 0.12 mm (5 mil) gap between the Legend and Pad. The typical solder mask swell today is 0.075 mm (3 mil) and many component mfr.'s are calling out 0.05 mm (2 mil) solder mask swell on their recommended patterns. Most Altium Users swell the solder mask in Altium Rules and the library has 1:1 scale solder mask. What is the Drafting Legend Clearance set up for in your Library Expert Preferences? What is the default solder mask swell set up in Altium?
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NeilVPeers Members Profile Send Private Message Find Members Posts Add to Buddy List Active User Joined: 04 Aug 2016 Status: Offline Points: 17	Post Options Post Reply Quote NeilVPeers Report Post Thanks(0) Quote Reply Posted: 18 Dec 2017 at 2:18am
	My default clearances are all set to 0.15 mm both in PCB LE and Altium - including the expansion rule. This then means I need a nominal 0.6 mm silk (legend) to pad clearance to avoid the silk to solder mask error - which is fine by me. The question was more to do with what would be the correct method of setting this in PCB LE preferences.

Tom H Members Profile Send Private Message Find Members Posts Add to Buddy List Admin Group Joined: 05 Jan 2012 Location: San Diego, CA Status: Offline Points: 5718	Post Options Post Reply Quote Tom H Report Post Thanks(0) Quote Reply Posted: 18 Dec 2017 at 8:31am
	All Legend data is set up in "Preferences > Drafting > Legend" if you are using V2017.21 Enterprise
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