PCB Libraries Forum Homepage
Forum Home Forum Home > PCB Footprint Expert > Questions & Answers
  New Posts New Posts RSS Feed - Making Mounting Holes in Footprint
  FAQ FAQ  Forum Search   Events   Register Register  Login Login

Making Mounting Holes in Footprint

 Post Reply Post Reply
Author
Message
DickMS View Drop Down
Active User
Active User
Avatar

Joined: 04 Jan 2014
Location: Seattle, WA, US
Status: Offline
Points: 33
Post Options Post Options   Thanks (0) Thanks(0)   Quote DickMS Quote  Post ReplyReply Direct Link To This Post Topic: Making Mounting Holes in Footprint
    Posted: 05 Sep 2014 at 3:10pm
I am trying to build a footprint for a Samtec HLE-125-2-G-DV-LC, which is a low profile SMT socket for dual row, .1" center square posts. The "LC" indicates that the socket has a pair of Locking Clips - and those require a 47 mil hole for each to be pressed into. These are part of the body of the connector, not electrical pins. I've had some puzzling problems trying, with Pad Stack Designer, to create these holes.

1. I used the same techniques as in the RJ45 video, and created a round through-hole, with no pad. PSD then created pads on the Top and Bottom layers, with sizes that were about half the hole size. Specifically, a 47 mil hole got 24 mil pads on Top and Bottom, despite selecting "None" in the Shape. This, of course, causes the build to fail with dire warnings about pads being smaller than the drilled out hole... and entering a size of "0" for the Pad X value just gets it re-set to 49 when I leave that edit-box.

So, I just "Add" the new pad stack and go back to the Pad Stack Manager.

2. In the PSM dialog box, I select the newly formed pad stack, and then work in the bottom area of the dialog box, labelled "Pad Stack". I see that the PSD, despite being instructed not to create a pad, has created pads on Top, Bottom, and Inner, as well as Top Mask, Bottom Mask, and Keepout All. These are visible on the "Pads" tab. I delete every entry except the "Keepout All", and adjust its size to match my needs in the edit box to the right. Moving to the Hole tab, I find that the hole is listed as a slot, rather than a "round", so I change that. Clicking "Done" (lower left) creates a new pad stack name - using metric values, despite my selecting mils. I click the upper "Done" (upper right), agree that I want to save my changes, and go back to the footprint.

3. I then place two pins, calling out the new pad stack, and using pin numbers larger than the 50 real, electrical pins on the part, 51 & 52. The holes appear as expected... but they both still have the pads in the pad stack, despite having deleted them in the PSM.

I don't really want two "pins" - Allegro requires a footprint to have as many pins as the schematic symbol, which of course doesn't include mounting holes.

I REALLY don't want pads, of any size, to appear on Top, Bottom, or any Inner layers. If they MUST appear, then they should be some size that doesn't blow up the Build of the part, because they will be drilled out.

Oh, and I saved the part to an FPX library. Then I closed PCBLX, re-opened it, and loaded the new library, and tried to build the part. PCBLX crashed with NullReference exceptions. It's repeatable. If I don't delete the unwanted layers in the hole's pad-stack, other NullReference errors are thrown when I try to examine the part from the library (before I can even try to build it).

I'm using 2014-9. Outputs using the OrCAD PCB (V16.6) translator. The FPX containing the problem part is attached:

I've tried to start over - same results. There must be some magic that I haven't figured out yet... This has been a great tool, and the addition of POD & STEP models was a big help. My intuition is just failing me this time... Any help would be greatly appreciated!
Back to Top
Back to Top
Tom H View Drop Down
Admin Group
Admin Group
Avatar

Joined: 05 Jan 2012
Location: San Diego, CA
Status: Offline
Points: 5718
Post Options Post Options   Thanks (0) Thanks(0)   Quote Tom H Quote  Post ReplyReply Direct Link To This Post Posted: 05 Sep 2014 at 3:15pm

I hope you are using V2014.09 with the new "User Definable" through-hole pad stacks and the new Pad Stack Manager.

There were also updates to OrCAD PCB.

I'll have one of the programmers respond and we'll dig into this issue.


Stay connected - follow us! X - LinkedIn
Back to Top
Tom H View Drop Down
Admin Group
Admin Group
Avatar

Joined: 05 Jan 2012
Location: San Diego, CA
Status: Offline
Points: 5718
Post Options Post Options   Thanks (0) Thanks(0)   Quote Tom H Quote  Post ReplyReply Direct Link To This Post Posted: 05 Sep 2014 at 3:31pm

There is a drop-down menu for "Pad Shape".

Select "None".

Stay connected - follow us! X - LinkedIn
Back to Top
chrisa_pcb View Drop Down
Moderator Group
Moderator Group
Avatar

Joined: 29 Jul 2012
Location: San Diego
Status: Offline
Points: 772
Post Options Post Options   Thanks (0) Thanks(0)   Quote chrisa_pcb Quote  Post ReplyReply Direct Link To This Post Posted: 05 Sep 2014 at 3:32pm

Hi,

 

You need to save the Padstack with warnings. It’s a peculiarity to Allegro Thruhole Padstacks in pad_designer.

 

1)      Close the Padstack Warning Window.

2)      Manually go File -> Save. You will get the same warning again. Close it again.

3)      Click Yes to save the padstack with warnings.

4)      Close the Pad_Designer.

 

-Chris

Back to Top
DickMS View Drop Down
Active User
Active User
Avatar

Joined: 04 Jan 2014
Location: Seattle, WA, US
Status: Offline
Points: 33
Post Options Post Options   Thanks (0) Thanks(0)   Quote DickMS Quote  Post ReplyReply Direct Link To This Post Posted: 05 Sep 2014 at 4:07pm
Ah - thanks, Chris! So I should NOT delete the unwanted pads/layers, and just manually save during the build process?

Tried. Re-created the padstack, leaving the unwanted layers alone. It finishes the build, after I save the stack with warnings...

Thanks, guy!

Back to Top
DickMS View Drop Down
Active User
Active User
Avatar

Joined: 04 Jan 2014
Location: Seattle, WA, US
Status: Offline
Points: 33
Post Options Post Options   Thanks (0) Thanks(0)   Quote DickMS Quote  Post ReplyReply Direct Link To This Post Posted: 05 Sep 2014 at 4:21pm
And, as icing on the cake, the two excess "pins" - the mounting holes - don't disturb Allegro when making a netlist, or when placing the connector on the PCB.

Yay!

Another win for the PCBLX support team!

You folks are terrific!

--Dick
Back to Top
 Post Reply Post Reply

Forum Jump Forum Permissions View Drop Down



This page was generated in 0.283 seconds.