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  <title>PCB Libraries Forum : CTI Respected in Footprints?</title>
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  <description><![CDATA[This is an XML content feed of; PCB Libraries Forum : Footprints / Land Patterns : CTI Respected in Footprints?]]></description>
  <pubDate>Wed, 22 Apr 2026 13:19:19 +0000</pubDate>
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   <title><![CDATA[CTI Respected in Footprints? : Thanks Tom,Anyway, does someone...]]></title>
   <link>https://www.PCBLibraries.com/forum/cti-respected-in-footprints_topic3123_post12431.html#12431</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=13411">StachowJ</a><br /><strong>Subject:</strong> 3123<br /><strong>Posted:</strong> 23 May 2022 at 2:04am<br /><br />Thanks Tom,<div><br><div>Anyway, does someone consider CTI on the library level?</div><div><br></div><div>What's your general approach guys? Do you maintain it on PCB design level, or you implement it in the library?</div></div><div><br></div><div>Do you think is a good approach?&nbsp;</div><div><br></div><div>I am pushed to redesign my footprints according CTI requirements (like modify silkscreen legend from ElCap (negative pin marking).</div>]]>
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   <pubDate>Mon, 23 May 2022 02:04:45 +0000</pubDate>
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   <title><![CDATA[CTI Respected in Footprints? : CTI has never been a consideration...]]></title>
   <link>https://www.PCBLibraries.com/forum/cti-respected-in-footprints_topic3123_post12430.html#12430</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=3">Tom H</a><br /><strong>Subject:</strong> 3123<br /><strong>Posted:</strong> 20 May 2022 at 8:14am<br /><br />CTI has never been a consideration in land pattern (footprint) requirements in any IPC Standards.&nbsp;<div><br></div><div><a href="https://www.raypcb.com/pcb-cti/" target="_blank" rel="nofollow">What is PCB CTI? - Printed Circuit Board Manufacturing &amp; PCB Assembly - RayMing (raypcb.com)</a></div><div><br></div>]]>
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   <pubDate>Fri, 20 May 2022 08:14:52 +0000</pubDate>
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   <title><![CDATA[CTI Respected in Footprints? : Hi,Question to librarians mostly.Do...]]></title>
   <link>https://www.PCBLibraries.com/forum/cti-respected-in-footprints_topic3123_post12429.html#12429</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=13411">StachowJ</a><br /><strong>Subject:</strong> 3123<br /><strong>Posted:</strong> 20 May 2022 at 4:27am<br /><br /><div><div>Hi,</div><div><br></div><div>Question to librarians mostly.</div><div><br></div><div>Do you respect CTI requirements in designed footprints?</div><div><br></div><div>Lastly I had a discussion in my organization about CTI for our products.&nbsp;</div><div><br></div><div>We mostly use CTI 400 for laminate, but silkscreen legend has CTI 175. This reduces the allowed electrical distance between two potentials on the board.</div><div><br></div><div>A good example is electrolytic capacitor, where entire negative side is covered with silkscreen.</div><div><br></div><div>Did you ever investigated such case?</div><div><br></div><div>Are you libraries common and PCB designers apply adjustments, or you design them specifically for plenty of requirements ?</div><div><br></div><div>I asked the question: when buying tiles for your new bathroom, do you expect getting ones with already cut holes for your water outlets or you drill it depends on needs at construction side? Silence as an answer.</div><div><br></div><div>What's your company's approach?&nbsp;</div></div><div><br></div>]]>
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   <pubDate>Fri, 20 May 2022 04:27:15 +0000</pubDate>
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