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Reusing Footprint From Same JEDEC Case Code?

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ckhalleran View Drop Down
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Post Options Post Options   Thanks (1) Thanks(1)   Quote ckhalleran Quote  Post ReplyReply Direct Link To This Post Topic: Reusing Footprint From Same JEDEC Case Code?
    Posted: 18 Nov 2019 at 2:15pm
I assume there SMT case sizes, where you can get by with one footprint (for all mfr's parts that use that SMT case size)? For example, I plan on having IPC "M" and "N" footprints, for 0603, 0805, 1206, 1210, and larger... different footprints for caps and resistors. The cap footprints would have the tallest height for that package (that I can find).

Likewise, for MELF's... I think I'm pretty safe just reusing the footprint that I made for a Microsemi MELF (even if it's a different manufacturer... as long as it's the same JEDEC package). I'm thinking SOT-23's are probably pretty close (I'd need different versions to account for pin mapping... but physical dimensions are pretty close).

But there's some parts where it seems like there's enough variation (like DPAK's which might have a different thermal pad design, from one manufacturer to another)?

So I'm wondering, if there's other standard JEDEC packages, where you're going to want to make device specific footprints because there actually is variation in their dimensions... you can't just reuse a footprint that you made for another part that had same JEDEC package?

Thanks! Chris
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Tom H View Drop Down
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Post Options Post Options   Thanks (1) Thanks(1)   Quote Tom H Quote  Post ReplyReply Direct Link To This Post Posted: 18 Nov 2019 at 2:33pm
Yes, you can get away with using one 0603 footprint for all 23 Resistor packages made but different manufacturers, as long as you standardize the package tolerances. 

Same goes for every component family. 

Take all your vendors for any specific package and throw out all High and Low tolerances for the Body and terminal dimensions. 

What many companies are starting to do is just use the nominal dimensions for each package with 0.00 tolerance. They are also removing the Fabrication and Assembly tolerances from the footprint calculation. This provides very stable footprint patterns and greatly reduces the size of the PCB library. 

As all machines for package creation, fabrication and assembly get more accurate I'm am seeing this as the long term future of the PCB library industry. There will be no more "Tolerances" or they will become insignificant. 

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