Fixes & Enhancements:

• 3D STEP:
• Update Polarized Chip Capacitor
• KiCad - terminal outlines are not registering correctly on the pads
• FP Designer:
• Adding a Paste Mask Layer to a through-hole pad stack for Pin-in-Paste added it twice in the Pad Stack Manager
• BGA automatic alphanumeric pin numbers start repeating at 'BA' after 'BY'
• When Drafting > Silkscreen > Allow Expanded Outline was turned off, the Save to FPX would not turn on
• Remove the word Flat from the SON and PSON in Specifications > Description Category list
• Library Editor:
• Right Mouse > Add New Rows > 2. If you change the number of rows from 2 to 1 the program added 2 
• Utilities > Find Duplicate Part Numbers was displaying one less found item than reality
• Remove the word Flat from the SON and PSON Physical Description in the FPX file 
• Options:
• Pad stack name was adding redundant Mask pads shape identifier (C, R, etc.) if it is the same as the top pad shape
• SMD Pad Stack Rules > Thermal Tabs
• Added Thermal Tab Minimum Pattern to Pad Edge
• Added ability to corner radius thermal pad paste mask apertures
• The SOIC/SOP component family zero orientation was not communicating to the Calculator
• Components > Surface Mount > DPAK > Thermal Tab Paste Mask Shape > 'Pattern' is the new default
• Calculators:
• Added reconciliation for 2 pin parts with dissimilar terminal sizes and tolerances (keeps calculation the same when pin locations are reversed)
• Surface Mount > DPAK > Paste Mask – 'Simple' now follows the Paste Mask Reduction % set in Options