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  <title>PCB Libraries Forum : Overlay clearance to include solder mask</title>
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  <pubDate>Tue, 21 Apr 2026 02:37:17 +0000</pubDate>
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   <title><![CDATA[Overlay clearance to include solder mask : All Legend data is set up in &amp;#034;Preferences...]]></title>
   <link>https://www.PCBLibraries.com/forum/overlay-clearance-to-include-solder-mask_topic2267_post9354.html#9354</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=3">Tom H</a><br /><strong>Subject:</strong> 2267<br /><strong>Posted:</strong> 18 Dec 2017 at 8:31am<br /><br />All Legend data is set up in "Preferences &gt; Drafting &gt; Legend" if you are using V2017.21 Enterprise<div><br></div>]]>
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   <pubDate>Mon, 18 Dec 2017 08:31:08 +0000</pubDate>
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   <title><![CDATA[Overlay clearance to include solder mask : My default clearances are all...]]></title>
   <link>https://www.PCBLibraries.com/forum/overlay-clearance-to-include-solder-mask_topic2267_post9353.html#9353</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=11913">NeilVPeers</a><br /><strong>Subject:</strong> 2267<br /><strong>Posted:</strong> 18 Dec 2017 at 2:18am<br /><br />My default clearances are all set to 0.15 mm both in PCB LE and Altium - including the expansion rule.<div>This then means I need a nominal 0.6 mm silk (legend) to pad clearance to avoid the silk to solder mask error - which is fine by me. The question was more to do with what would be the correct method of setting this in PCB LE preferences.</div>]]>
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   <pubDate>Mon, 18 Dec 2017 02:18:03 +0000</pubDate>
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   <title><![CDATA[Overlay clearance to include solder mask : In Preferences, the default Legend...]]></title>
   <link>https://www.PCBLibraries.com/forum/overlay-clearance-to-include-solder-mask_topic2267_post9352.html#9352</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=3">Tom H</a><br /><strong>Subject:</strong> 2267<br /><strong>Posted:</strong> 17 Dec 2017 at 11:18am<br /><br /><div>In Preferences, the default Legend Clearance is set to 0.12 mm (5 mil) gap between the Legend and Pad.&nbsp;</div><div><br></div><div>The typical solder mask swell today is 0.075 mm (3 mil) and many component mfr.'s are calling out 0.05 mm (2 mil) solder mask swell on their recommended patterns.&nbsp;</div><div><br></div>Most Altium Users swell the solder mask in Altium Rules and the library has 1:1 scale solder mask.&nbsp;<div><br></div><div>What is the Drafting Legend Clearance set up for in your Library Expert Preferences?&nbsp;</div><div><br></div><div>What is the default solder mask swell set up in Altium?&nbsp;</div><div><br></div>]]>
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   <pubDate>Sun, 17 Dec 2017 11:18:37 +0000</pubDate>
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   <title><![CDATA[Overlay clearance to include solder mask : Having created a footprint and...]]></title>
   <link>https://www.PCBLibraries.com/forum/overlay-clearance-to-include-solder-mask_topic2267_post9350.html#9350</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=11913">NeilVPeers</a><br /><strong>Subject:</strong> 2267<br /><strong>Posted:</strong> 17 Dec 2017 at 5:30am<br /><br />Having created a footprint and then used it in Altium I am getting a silkscreen to solder mask error.&nbsp;<div>The rules in PCB LE are set to give overlay clearance to copper and the footprint was correctly created to this rule.</div><div>Is there a way to include overlay clearance to solder mask or should I simply increase the clearance to copper to allow for my standard solder mask clearance?</div><div><br></div><div>Many thanks</div><div><br></div><div>Neil</div><div>&nbsp;&nbsp;</div>]]>
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   <pubDate>Sun, 17 Dec 2017 05:30:58 +0000</pubDate>
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