Thermal Tab and Solder Paste Discussion

My company has finally installed PCB Footprint Expert on our computers. Time to update the old .xml preference file to the new .opt file !

By default, the IPC-7351C.opt file uses a Thermal Tab Paste Mask Percentage of 50%.

The IPC-7351B states that "The default paste mask for these pads is 40% of the overall land area".

May I ask why this 10% difference ? I know things have changed since the realase of IPC-7351B. 

Is it just a guess or is there some document that talks about this 50% amount ? 

EDIT : I just read PCB FOOTPRINT EXPERT documentation more closely and found this line : "IPC- 7093A figure 3-10 recommends that the stencil design provide 50 – 60% solder paste coverage on the thermal pad area."

Follow up question : why the difference between IPC-7351 and IPC-7093 ?

Another topic : What do you think about vias in thermal tabs ? Depending on the person I ask this question, I get two main answers : 

And this article, linked in the previous post : https://pcdandf.com/pcdesign/index.php/magazine/10676-btc-design-1603

Maybe I am missing something, but the option for solder mask define is not easily usable in QFN with tab. Yes you can set a paste mask pourcentage. The SM pattern will match 1:1 with the solder paste pattern. But the option for minimum pattern space is non functional.

Hence the software will arbitrarily decide how many little square it will generate to meet the required paste %. But without the minimum pattern space options, there is no way to guaranty that the via holes will be covered with solder mask. The only indirect way to control the pattern spacing is to reduce the paste %, which is not ideal.

Best regards,