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• Drafting Options:
• Added a new Right-Angle Triangle. This is mostly used for Pin 1 corner Polarity Marking.
• Console Options:
• IPC-7351B Naming Convention – in the SOIC component family, the program was adding an extra X after the pin pitch.
• Master FPX File Name – when the master FPX file name was longer than 20 characters, the program was throwing an Unhandled Exception Error.
• Pad Stack Rules – Gang Solder Mask Shape had a bug issue that affected solder mask shape on SMD pads.
• Calculator Component Families:
• All Grid Array’s (BGA, CGA & LGA) – setting the local Calculator solder mask in “Pad Stack Rules” panel does not work. A warning message was inserted prompting the user to set the solder mask swell in the “Terminal Density Level” panel.
• All Through-hole Headers – When moving Headers to FP Designer and save to FPX, reopening the footprint dropped the Body Length & Width.
• MELF:
• When creating a Diode MELF, the local “Pad Stack Rules > Miscellaneous > Cathode/Anode Pin Names” was disabled.
• When moving the MELF to FP Designer and save to FPX threw an error message.
• Chip, MELF, Molded, SOD & SODFL Diodes - fixed Numeric/Alpha pin names and pin swap options on the right mouse button.
• SMD Crystal – Physical Description had Body Length listed twice and no Body Width.
• PQFN & PQFN w/Thermal – footprint name had wrong body length and width.
• SOP w/Thermal – the Physical Description did not indicate w/Thermal Tab.
• DIP and DIP Socket:
• The Physical Description had the Length and Width swapped.
• The Silkscreen Outline was not translating to any CAD tool.
• When moving the DIP to FP Designer and save to FPX, reopening the footprint dropped the Body Width.
• Flange Mount (TO) Horizontal – the Physical Description was missing the Body Length and the Pin Qty was incorrect.
• Flange Mount (TO) Vertical – the Footprint Name and Physical Description had the Body Length and Width swapped.
• All Through-hole families:
• Pads and Holes on Assembly did not work properly.
• Courtyard to Pad Excess was 0.45 and updated to 0.25.
• CAD Tools:
• KiCad – through-hole pad stacks had holes on assembly going to the fabrication layer.
• Options:
• Drafting > Silkscreen – changing the Reference Designator line width % was resetting back to 10% default when closing and reopening the program.