• Updated Toe Solder Joint Goals for Chip component less than 1.6 mm in length per the upcoming IPC-7351C
• 0402 Toe is now set to 0.15 mm
• 0201 Toe is now set to 0.12 mm
• 01005 Toe is now set to 0.10 mm

The courtyard excess change from 0.15 mm to 0.25 mm was a programming mistake and it is being fixed right now in a V2014.06 sneak release that will be posted soon. Great catch! And thanks for reporting this typo.

The important update was that the original "Toe" goal was 0.20 mm for all parts less than 1.6 mm length.

IPC is drafting a new standard that replaces IPC-CM-770E called IPC-7070 Component Mounting Issues and Recommendations of which I am the co-chairperson.

I was at IPC headquarters the week of July 14 with Dieter Bergman and I locked in a conference room for 3 days rewriting from scratch the IPC-7351C Land and Pad Pattern Development Issues and Recommendations and teleconferencing daily with the chairperson of the IPC-7070 in Berlin Germany.

Out of that committee meeting, the most significant change was to address tomb-stoning of micro-miniature chip components less than 1.6 mm length. The 0.20 mm Toe was too robust for the 0402 and the 0201 is 50% smaller and the 01005 is 50% smaller again. So we first had to develop an acceptable Toe goal for the 0402 and the 0.15 mm Toe value was accepted. Then we had to figure out what would be the minimum Toe for any package regardless of it's size and that value was set at 0.10 mm for the 01005 package. Then the 0201 was set in the middle at 0.12 mm Toe.

Thinning the paste mask stencil is also required but that information will reside in the new IPC-7070.

Any data in the existing IPC-7351 pertaining to assembly attachment is being relocated in the IPC-7070 standard and the two new documents refer back and forth to each other.

I should also note that the IPC-7251 for through-hole technology is being added to the IPC-7351C so there will only be a single standard for all Land Pattern Guidelines for SMD (Surface Mounted Device), IMD (Inserted Mounted Device) and UMD (Unpackaged Mounted Die).

PCB Libraries, Inc. prides itself in implementing the latest technology into our tools as fast as possible rather than waiting for the standards release date, which will not happen for another year due to all the upcoming committee meetings at SMTA in Chicago, IL, APEX in San Diego, CA and the necessary committee approvals that need to be reviewed and signed off by unanimous vote.

We did a V2014.06 sneak release that fixed the courtyards for the micro-mini Chips.

If you do not see these changes in your User Preference file then select the button "Restore User Defaults".

Fixed in V2014.06 Sneak Release:

• When selecting rows in a FPX file to Build Library, the program froze

• The Micro Chip component courtyard was accidentally changed from 0.15 mm to 0.25 mm

• Right clicking on the FPXC Viewer no longer crashes it

• Stencil pattern no longer shrinks the trim

• Extents for micro parts expanded in Viewer to include polarity dot

• Preferences for micro DFN & CHIPS updated

  • If you don’t see this remove or update your preference files

The courtyard is getting nudged by the silkscreen outline. The center of the silkscreen outline must be smaller than the center of the courtyard outline.

If you changed the silkscreen line width and pad to silkscreen value, the courtyard would come in closer.

Our policy is that silkscreen outlines can't be outside the placement courtyard.

For these micro-miniature parts, IPC does not want a silkscreen but we still add one.

Also, for these micro-miniature parts, there is no Least or Most environments (or rather all 3 environments are the same). There has to be a very controlled amount of solder for these 3 unique packages or assembly is compromised.