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  <title>PCB Libraries Forum : 008004 land pattern dimensions for high yield</title>
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  <pubDate>Tue, 21 Apr 2026 18:43:59 +0000</pubDate>
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   <title><![CDATA[008004 land pattern dimensions for high yield : The only sane thing to do in this...]]></title>
   <link>https://www.PCBLibraries.com/forum/008004-land-pattern-dimensions-for-high-yield_topic3393_post13558.html#13558</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=14555">SDTKO</a><br /><strong>Subject:</strong> 3393<br /><strong>Posted:</strong> 14 Jun 2024 at 1:29am<br /><br /><div>The only sane thing to do in this case - as you already figured out - is talking to your assembler.</div><div><br></div><div>For small chip packages, chances are that generic calculators and general recommendations do more harm than good.<br></div>]]>
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   <pubDate>Fri, 14 Jun 2024 01:29:16 +0000</pubDate>
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   <title><![CDATA[008004 land pattern dimensions for high yield : For anyone else looking, I found...]]></title>
   <link>https://www.PCBLibraries.com/forum/008004-land-pattern-dimensions-for-high-yield_topic3393_post13556.html#13556</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=12058">ransonjd</a><br /><strong>Subject:</strong> 3393<br /><strong>Posted:</strong> 13 Jun 2024 at 7:50am<br /><br />For anyone else looking, I found this IPC APEX presentation from Fuji:<br><br><a href="https://www.ipc.org/system/files/technical_resource/E40%26S06_03%20-%20Scott%20Wischoffer.pdf" target="_blank" rel="nofollow">https://www.ipc.org/system/files/technical_resource/E40%26S06_03%20-%20Scott%20Wischoffer.pdf</a>]]>
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   <pubDate>Thu, 13 Jun 2024 07:50:54 +0000</pubDate>
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   <title><![CDATA[008004 land pattern dimensions for high yield : I&amp;#039;m going to be using 008004...]]></title>
   <link>https://www.PCBLibraries.com/forum/008004-land-pattern-dimensions-for-high-yield_topic3393_post13555.html#13555</link>
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    <![CDATA[<strong>Author:</strong> <a href="https://www.PCBLibraries.com/forum/member_profile.asp?PF=12058">ransonjd</a><br /><strong>Subject:</strong> 3393<br /><strong>Posted:</strong> 13 Jun 2024 at 7:34am<br /><br />I'm going to be using 008004 (0201 metric) capacitors in an ultra-small design.&nbsp;<div><br></div><div>I'd like to get as high assembly yield as possible, and I was wondering if there were any recommended low-defect land patterns?&nbsp;</div><div><br></div><div>I've seen a number of papers on 01005 land patterns, but I haven't seen similar for 008004.&nbsp;&nbsp;</div><div><br></div><div>I want as many data points as I can get.&nbsp;</div><div><br></div><div>I have requested guidance from my assembler, and Murata provides a recommended range of dimensions.&nbsp;</div><div><br></div>]]>
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   <pubDate>Thu, 13 Jun 2024 07:34:57 +0000</pubDate>
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